1. Field of the Invention
The present invention relates to a process for fabricating a static induction transistor and to a process for fabricating a solid-state image sensor device using the static induction transistor, and more particularly to a process for fabricating a longitudinal static induction transistor having a source and a drain which are formed on the opposite major surface sides of a substrate, and to a process for fabricating a solid-state image sensor device using the longitudinal static induction transistor.
2. Description of the Prior Art
A static induction transistor is classified as a junction type field effect transistor in a broad sense, but is different from a usual field effect transistor in that an impurity density of a material forming a channel region is low. As a result, in a normal state where no bias voltage is applied to the gate of the static induction transistor, a depletion layer is created so that the channel is pinched off and remains in a normally off state. The static induction transistor has a further feature that a source-drain current (I.sub.DS) exhibits a non-saturated characteristic with respect to a source-drain voltage (V.sub.DS).
Due to a diffusion potential difference between the gate region and the channel region, a depletion layer is created in the channel region, so that the channel is pinched off. The pinch-off point is a so-called "true gate". The potential distribution around the "true gate" has a so-called "potential well" having the "true gate" as its bottom. The profile and level of the potential distribution are greatly dependent upon the diffusion potential difference. As a consequence, in order that the channel may be well controlled by the gate (that is, in order that the channel may be well pinched off) the depletion layer must be extended deeply in the direction of thickness in the channel region. That is, it is preferable that the gate region is deeply formed in the channel region compared with the source region.
When the static induction transistors are integrated, it is preferable that variation among the static induction transistor elements is minimized. For instance, the geometric dimensions of the elements in each array on a single chip must be minimized so that the channels may be formed with a uniform width.
In the case of a solid-state image sensor device comprising a plurality of static induction transistors arranged one- or two-dimensionally, it is preferable that the variation among the picture cells be minimized so that a high quality picture can be obtained.
The gate and source regions of the static induction transistor constitute a light sensitive region in which carriers are generated in response to an incident light. Therefore, it is preferable that the variation in the geometric dimensions of the picture cells in each array is minimized so that the channels are formed with a uniform width.
The gate region may be formed by heavily doping acceptors such as boron (B) into an n.sup.- (.nu.) region. According to known ion implantation techniques, even when boron is implanted with the acceleration energy of the order of 400 kV, it penetrates only one micrometer. Even if a thermal diffusion process is employed after the ion implantation process, the thermal diffusion is isotropical so that the introduced boron ions are diffused not only in the longitudinal direction (that is, in the direction of thickness) but also in the lateral direction, that is, in the picture cell array direction. As a result, the dimensions of the gate region must be designed taking into consideration the fact that the gate region is broadened by the thermal diffusion. Since the controllability of the thermal diffusion process is low, it is extremely difficult to fabricate a static induction transistor or a solid-state image sensor device having static induction transistors with a high degree of dimensional accuracy.